Highly integrated memory devices are typically required for many state-of-the-art applications requiring large quantities of data storage. Moreover, because the overall size of an integrated circuit memory device may be fixed, attempts to increase data storage capacity have generally focused on techniques to increase integration density by reducing memory device unit cell size and improving the efficiency of the control circuitry within the memory device. Notwithstanding these attempts to increase data storage capacity, many multi-bank integrated circuit memory devices 2 have banks of memory cell arrays (4, 6, 8, 10, 12, 14, 16) and sense amplifiers, equalization circuits and isolation circuits which are configured in a non-optimum manner and require separate control signals and circuits (18, 20, 22, 24, 26) for generating these control signals, as illustrated by FIG 1.